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3.10
Device Initialization
Following power-up, under-voltage reset, or a SPI reset command sequence, the device proceeds through an internal initial-
ization process as shown below. Figure 33 also shows the device performance for an example external system level initialization
procedure.
Internal Initialization
OTP Copy to
Mirror Registers
Offset Cancellation
Startup Phase 1
t OC_PHASE1
Offset Cancellation
Startup Phase 2
t OC_PHASE2
Offset Cancellation
Startup Phase 3
t OC_PHASE3
Offset Cancellation
Normal Mode
External Initialization
Mode
Delay
Read DEVSTAT
to clear flags
Re-read DEVSTAT
to verify Status Dly
Initialize R/W
Registers to
Desired State
Verify X-Axis
Offset
Dly
Verify X-Axis
Self Test &
ARM Asserted
Verify Y-Axis
Offset & ARM_Y
DeAsserted
Dly
Verify X-Axis
Offset & ARM
DeAsserted
Verify Y-Axis
Self Test &
ARM_Y Asserted
Dly
Verify X-Axis
Offset & ARM
DeAsserted
Verify Y-Axis
Offset & ARM_Y
DeAsserted
Re-Initialize
R/W Registers Normal
(if needed)
and
Set ENDINIT
t STRISE
t OP
X_ST
X_ARM
Assertion
Dependent on
Arming Mode
t ST_OMB
DeAssertion
Dependent on Pulse
Stretch and/or Arming Mode
Y_ST
Assertion
Dependent on
t STFALL
DeAssertion
Dependent on Pulse
Y_ARM
Arming Mode
DeActivate
Activate
Stretch and/or Arming Mode
POR
Ready for SPI
Command
Internal
Offset Error
Activate
X-Axis
X-Axis
Self Test
Y-Axis
Self Test
DeActivate
Y-Axis
ENDINIT Clear
Corrected to ‘0’
Self Test
Self Test
Notes:1) X-Axis and Y-Axis Self Test can be enabled and evaluated simultaneously to reduce test time.
For failure mode coverage of the arming pins and of potential common axis failures, Freescale recommends independent self test activation.
2) t STRISE and t STFALL are dependent on the selected LPF group delay.
Figure 33. Initialization Process
MMA655x
Sensor
Freescale Semiconductor, Inc.
41
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